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English(EN) Samsung teases new HBM5 with twice the performance of HBM4E —ambitious data transfer rates could hint at 4,096-bit interface

三星预告HBM5内存，性能目标翻倍

作者 PulseAugur 编辑部 · [1 个来源] ·

三星已发布其下一代HBM5内存，目标是与当前的HBM4E标准相比，性能翻倍，功耗效率提高20%。这一宏伟目标暗示着可能转向4096位接口，这将显著提高数据传输速率。该公司目标是在2028-2029年实现每个堆栈约4 TB/s的峰值带宽，AI加速器可能每个封装包含20-24个HBM5堆栈，达到高达96 TB/s。 AI

影响 内存技术的这项进步对于驱动下一代AI加速器至关重要，能够实现更高的带宽和更快的数据处理。

排序理由 三星发布了其下一代HBM5内存规格，详细说明了性能和效率目标。[lever_c_demoted from research: ic=1 ai=0.7]

在 Tom's Hardware 阅读 →

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三星预告HBM5内存，性能目标翻倍

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三星发布了其下一代HBM5内存规格，详细说明了性能和效率目标。[lever_c_demoted from research: ic=1 ai=0.7]
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报道来源 [1]

  1. Tom's Hardware TIER_1 English(EN) · Anton Shilov ·

    三星预告新款 HBM5，性能是 HBM4E 的两倍——雄心勃勃的数据传输速率可能暗示 4,096 位接口

    Samsung expects HBM5 to deliver 4 TB/s of bandwidth per stack by late 2020s, which will enable AI accelerators with aggregated memory bandwidth of around 100 TB/s.

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