English(EN) Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer

行业巨头在50纳米间距集成二维晶体管，后硅时代临近

作者 PulseAugur 编辑部 · [1 个来源] · 2026-06-19 13:13

行业领导者imec、ASML和台积电已成功在300毫米晶圆上制造出50纳米间距的互补型二维材料晶体管，这是迈向后硅时代的重要一步。这项在IEEE/JSAP超大规模集成电路技术与电路研讨会上展示的突破性技术，利用单次极紫外光（EUV）光刻曝光即可制造出短至28纳米的沟道。集成晶体管表现出高开关比和近乎完美的开关特性，其中n沟道器件使用二硫化钼，p沟道器件使用二硒化钨或二硫化钨。通过颠倒传统晶体管制造工艺，将金属触点置于二维沟道下方，这项成就克服了以往的尺寸瓶颈。 AI

影响这项晶体管技术的进步可能为未来更强大、更高效的人工智能硬件奠定基础。

排序理由该集群报道了半导体制造领域的一项重大技术进步，涉及主要行业参与者以及晶体管尺寸缩放方面的突破。[lever_c_demoted from significant: ic=1 ai=0.7]

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报道来源 [1]

Tom's Hardware TIER_1 English(EN) · Luke James · 2026-06-19 13:13

Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer

Imec, ASML, and TSMC have integrated both n-type and p-type transistors with atomically thin 2D channels on a single 300mm wafer.

报道来源 [1]

Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer

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