华为宣布了一项名为“LogicFolding”的新芯片架构，旨在规避美国制裁，并于2031年实现“1.4nm级”晶体管密度。这一新设计基于优先考虑信号速度而非组件尺寸的“Tau Scaling Law”，允许堆叠逻辑电路将晶体管密度提高55%。该技术预计将在即将推出的Kirin智能手机处理器中首次亮相，之后将应用于AI和数据中心芯片，可能为受限的外国硬件提供替代方案。 AI
影响 这一发展可能为中国提供国内的AI和数据中心芯片替代品，可能影响全球供应链和竞争。
排序理由 该公告详细介绍了一家主要科技公司推出的新芯片架构和扩展定律，旨在规避国际制裁并与全球现有公司竞争。
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Huawei Technologies has unveiled a new scaling law and chip architecture intended to deliver transistor performance equivalent to a 1.4-nanometre process node – representing the leading edge of semiconductor development – in a few years without relying on advances in lithography …
Huawei Technologies unveiled a new “LogicFolding” chip design framework built on its proprietary Tau scaling law, claiming it can dramatically boost transistor density and power efficiency without EUV lithography — potentially helping China narrow the gap with TSMC and Nvidia des…
Huawei claims sanctions-busting breakthrough with 1.4nm-class chips by 2031, claims 55% higher transistor… Huawei Technologies unveiled a new “LogicFolding” chip design framework built on its proprietary Tau scaling law, claiming it can dramatically boost transistor density and p…