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English(EN) GlobalFoundries VP details FDX Fusion technology, sporting 7nm-class performance without the need for EUV tools — company targets 2030 for high-volume manufacturing, with planar transistors in tow

GlobalFoundries 目标 2030 年利用无 EUV 的 FDX Fusion 技术生产 7nm 级芯片

GlobalFoundries 正在开发 FDX Fusion,这是一种新的制造工艺,旨在提供 7nm 级性能,而无需依赖昂贵的极紫外光刻 (EUV) 工具。该技术利用先进的平面晶体管和 FD-SOI(全耗尽绝缘体上硅)架构,目标是在 2030 年实现大规模生产。该工艺专为连接芯片、边缘微控制器、汽车雷达以及专注于功耗和连接性的数据中心组件等应用而设计。 AI

影响 芯片制造的这一进步可能使 AI 特定硬件的生产更具成本效益,从而可能加速 AI 的采用。

排序理由 半导体制造工艺公告,具有明确的目标日期和性能指标。[lever_c_demoted from significant: ic=1 ai=0.7]

在 Tom's Hardware 阅读 →

AI 生成摘要 · Google Gemini · 来自 1 个来源。 我们如何撰写摘要 →

GlobalFoundries 目标 2030 年利用无 EUV 的 FDX Fusion 技术生产 7nm 级芯片

本文如何被排名

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14 / 100
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Research
半导体制造工艺公告,具有明确的目标日期和性能指标。[lever_c_demoted from significant: ic=1 ai=0.7]
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Only one publisher covered this so far. Single-source stories can still rank when the publisher is high-authority, but they lack cross-source corroboration.
Topics
infra
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High
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Breaking (< 6h)
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完整方法见我们的编辑标准。

报道来源 [1]

  1. Tom's Hardware TIER_1 English(EN) · Anton Shilov ·

    GlobalFoundries VP details FDX Fusion technology, sporting 7nm-class performance without the need for EUV tools — company targets 2030 for high-volume manufacturing, with planar transistors in tow

    GlobalFoundries reveals new details about its FDX Fusion technology, which promises 7nm-class performance and 8nm-class logic density using planar FD-SOI transistors without EUV lithography, shares what is next for FDX Fusion node, and the FDX program in general.