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Hybrid bonding for HBM delayed to decade's end, TSMC advances logic integration

By PulseAugur Editorial · [1 sources] ·

Hybrid bonding, a technique for directly joining copper pads on chip surfaces, is seeing widespread adoption in logic chips but has been delayed for high-bandwidth memory (HBM). While TSMC has advanced its bonding pitch and Intel has implemented it in server CPUs, a JEDEC decision to allow HBM4 to use less sophisticated microbump technology has pushed the integration of hybrid bonding for HBM to HBM4E and HBM5, expected by the end of the decade. This advanced stacking method offers significantly higher interconnect density compared to traditional methods, enabling more integrated chiplet designs. AI

IMPACT Advanced chip stacking techniques like hybrid bonding are crucial for increasing AI hardware performance by enabling denser, faster memory integration.

RANK_REASON Discussion of advanced semiconductor manufacturing techniques and their roadmap, including delays impacting future memory standards. [lever_c_demoted from significant: ic=1 ai=0.7]

Read on Tom's Hardware →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

Hybrid bonding for HBM delayed to decade's end, TSMC advances logic integration

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Discussion of advanced semiconductor manufacturing techniques and their roadmap, including delays impacting future memory standards. [lever_c_demoted from significant: ic=1 ai=0.7]
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COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Luke James ·

    The current state of Hybrid Bonding in 2026 — TSMC sits at 6 microns and the HBM delay that nobody expected

    Hybrid bonding, the copper-to-copper joining technique that replaces solder microbumps in 3D chip stacks, is in high-volume production on logic and freshly postponed on memory.

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