Hybrid bonding, a copper-to-copper chip joining technique, is in high-volume production for logic chips but its adoption for High Bandwidth Memory (HBM) has been delayed. A recent JEDEC decision allows HBM4 to continue using less advanced microbump technology, pushing hybrid bonding's debut in HBM to HBM4E and HBM5 by the end of the decade. While TSMC is advancing its hybrid bonding pitch and Intel has implemented it in server CPUs, the memory sector's delay is attributed to this JEDEC decision. AI
IMPACT This delay in HBM adoption could impact the performance and cost of AI accelerators that rely on high-bandwidth memory.
RANK_REASON The article details advancements in chip manufacturing technology (hybrid bonding) and a significant delay in its application to a key memory standard (HBM), impacting the semiconductor industry's roadmap.
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- 3D V-Cache
- AMD
- Clearwater Forest
- ECTC
- EV Group
- HBM4
- HBM4E
- HBM5
- High Bandwidth Memory
- Intel
- Interuniversity Microelectronics Centre
- JEDEC
- TSMC
- Tsmc Soic
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