PulseAugur
EN
LIVE 15:34:21

Samsung teases HBM5 memory with doubled performance target

By PulseAugur Editorial · [1 sources] ·

Samsung has announced its next-generation HBM5 memory, aiming to double the performance and improve power efficiency by 20% compared to the current HBM4E standard. This ambitious goal suggests a potential shift to a 4,096-bit interface, which would significantly increase data transfer rates. The company is targeting peak bandwidth of around 4 TB/s per stack by 2028-2029, with AI accelerators potentially featuring 20-24 HBM5 stacks per package, reaching up to 96 TB/s. AI

IMPACT This advancement in memory technology is crucial for powering the next generation of AI accelerators, enabling higher bandwidth and faster data processing.

RANK_REASON Samsung announced its next-generation HBM5 memory specification, detailing performance and efficiency targets. [lever_c_demoted from research: ic=1 ai=0.7]

Read on Tom's Hardware →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

Samsung teases HBM5 memory with doubled performance target

How we ranked this

Signal score
35 / 100
Composite score across the factors below. Higher = stronger signal that this story matters right now.
Newsworthiness bucket
Tool
Samsung announced its next-generation HBM5 memory specification, detailing performance and efficiency targets. [lever_c_demoted from research: ic=1 ai=0.7]
Source corroboration
Single-source cluster
Only one publisher covered this so far. Single-source stories can still rank when the publisher is high-authority, but they lack cross-source corroboration.
Topics
infra
Editorial topic classification. Feeds into how the story surfaces on /topic/<slug> hub pages and into the per-entity coverage mix.
AI-industry relevance
High
Clearly on-topic for AI-industry coverage.
Story freshness
Breaking (< 6h)
Fresh story with cross-source coverage still developing. Ranking may shift as more sources report.

Full methodology in our editorial standards.

COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Anton Shilov ·

    Samsung teases new HBM5 with twice the performance of HBM4E —ambitious data transfer rates could hint at 4,096-bit interface

    Samsung expects HBM5 to deliver 4 TB/s of bandwidth per stack by late 2020s, which will enable AI accelerators with aggregated memory bandwidth of around 100 TB/s.

RELATED ENTITIES

RELATED TOPICS