JEDEC
PulseAugur coverage of JEDEC — every cluster mentioning JEDEC across labs, papers, and developer communities, ranked by signal.
- 2026-07-08 research_milestone JEDEC released the new SPHBM4 standard to lower the cost of AI memory. source
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Hybrid Bonding for HBM Delayed to Decade's End, Logic Adoption Advances
Hybrid bonding, a copper-to-copper chip joining technique, is in high-volume production for logic chips but its adoption for High Bandwidth Memory (HBM) has been delayed. A recent JEDEC decision allows HBM4 to continue …
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Samsung teases HBM5 memory with double the performance of HBM4E
Samsung has announced its next-generation High Bandwidth Memory, HBM5, which aims to double the performance and increase power efficiency by 20% compared to the current HBM4E standard. This ambitious goal may be achieve…
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China's CXMT begins HBM3E production, aiming to close AI memory gap · 2 sources tracked
China's leading memory manufacturer, ChangXin Memory Technologies (CXMT), has begun risk production of HBM3E chips, a critical component for advanced AI processors. While currently a generation behind industry leaders, …
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China's CXMT sues Pentagon over military company blacklisting
China's top DRAM manufacturer, CXMT, has filed a lawsuit against the U.S. Department of Defense, challenging its designation as a Chinese military company. CXMT argues that its chips adhere to standard civilian JEDEC sp…
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Samsung integrates logic into LPDDR5X memory for faster AI inference
Samsung has developed LPDDR5X-PIM, a new memory technology that integrates logic units directly into the memory chips. This Processing-in-Memory (PIM) approach aims to reduce the cost and power consumption associated wi…
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AI hardware advances: Cerebras stacks DRAM, HBM faces growing costs
At Hot Chips 2026, leading memory and chip manufacturers discussed the future of AI hardware, focusing on advancements in wafer-scale processing and High Bandwidth Memory (HBM). Cerebras unveiled its roadmap for stacked…
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AI servers adopt mobile memory, driving up costs and straining supply
AI servers are increasingly incorporating LPDDR5X memory, traditionally used in mobile devices, due to rising CPU core counts and escalating data demands in AI and supercomputing workloads. This shift is driven by LPDDR…
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MCP, eMMC, and eMCP: Understanding Integrated Memory Technologies
This article delves into the distinctions between Multi-Chip Package (MCP), embedded MultiMediaCard (eMMC), and embedded Multi-Chip Package (eMCP) technologies. MCP is a packaging method that integrates multiple chips l…
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JEDEC's SPHBM4 Standard Slashes AI Memory Costs
JEDEC has introduced a new standard, SPHBM4, designed to reduce the cost of High Bandwidth Memory (HBM) used in AI processors. This standard utilizes a narrower 512-bit interface and allows for the use of less expensive…
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New SPHBM4 standard aims to democratize HBM for AI chips
JEDEC has announced a new standard, SPHBM4 (JESD330-4), designed to democratize High Bandwidth Memory (HBM) by enabling its use in standard packaging. This new standard allows for HBM assembly outside of specialized, su…
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SNIA launches MRAM SIG to standardize interfaces and boost adoption
The Storage Networking Industry Association (SNIA) has launched a Magnetoresistive Random-Access Memory (MRAM) Special Interest Group (SIG) to foster MRAM adoption. This group aims to standardize MRAM technologies and d…
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JEDEC develops LPDDR6 for AI's growing on-device demands
JEDEC is developing LPDDR6 memory to meet the increasing demands of on-device AI applications. This new memory standard aims to provide higher bandwidth and lower power consumption, crucial for accelerating AI tasks dir…
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AMD launches EXPO Ultra Low Latency DDR5 memory
AMD has introduced EXPO Ultra Low Latency (ULL) for DDR5 memory, aiming to enhance performance by optimizing sub-timings. The company claims this new feature will offer a 4% average performance uplift over standard EXPO…
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Memory giants push new MRDIMM standard for AI, HPC servers
Major memory manufacturers Samsung Electronics, SK Hynix, and Micron are nearing completion of the next-generation server DRAM module standard, MRDIMM. This new standard is optimized for AI and high-performance computin…