JEDEC
PulseAugur coverage of JEDEC — every cluster mentioning JEDEC across labs, papers, and developer communities, ranked by signal.
3 day(s) with sentiment data
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New SPHBM4 standard aims to democratize HBM for AI chips
JEDEC has announced a new standard, SPHBM4 (JESD330-4), designed to democratize High Bandwidth Memory (HBM) by enabling its use in standard packaging. This new standard allows for HBM assembly outside of specialized, su…
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SNIA launches MRAM SIG to standardize interfaces and boost adoption
The Storage Networking Industry Association (SNIA) has launched a Magnetoresistive Random-Access Memory (MRAM) Special Interest Group (SIG) to foster MRAM adoption. This group aims to standardize MRAM technologies and d…
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JEDEC develops LPDDR6 for AI's growing on-device demands
JEDEC is developing LPDDR6 memory to meet the increasing demands of on-device AI applications. This new memory standard aims to provide higher bandwidth and lower power consumption, crucial for accelerating AI tasks dir…
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AMD launches EXPO Ultra Low Latency DDR5 memory
AMD has introduced EXPO Ultra Low Latency (ULL) for DDR5 memory, aiming to enhance performance by optimizing sub-timings. The company claims this new feature will offer a 4% average performance uplift over standard EXPO…
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Memory giants push new MRDIMM standard for AI, HPC servers
Major memory manufacturers Samsung Electronics, SK Hynix, and Micron are nearing completion of the next-generation server DRAM module standard, MRDIMM. This new standard is optimized for AI and high-performance computin…