FPGA-based sigmoid function implementation achieves high accuracy with low hardware use

Researchers have developed a new hardware-efficient method for implementing the sigmoid activation function on FPGAs. This approach utilizes a mixed-radix CORDIC algorithm, combining radix-2 and radix-4 iterations for faster convergence and reduced hardware overhead. The implementation on a Xilinx Virtex-7 FPGA achieved a low logic slice count and minimal DSP usage, demonstrating a mean absolute error competitive with existing sigmoid implementations. AI

影响 Offers a more efficient hardware implementation for deploying neural networks on resource-constrained edge devices.

排序理由 Academic paper detailing a novel hardware implementation of a common neural network activation function.

在 arXiv cs.AI 阅读 →

• CORDIC
• FPGA
• Sigmoid function
• Xilinx
• Xilinx Virtex-7

• 论文
• 基础设施

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