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English(EN) Energy-Efficient Implementation of Spiking Recurrent Cells on FPGA

FPGA加速器提升脉冲神经网络的能效

两篇新研究论文详细介绍了在现场可编程门阵列(FPGA)上实现的节能脉冲神经网络(SNN)的进展。第一篇论文介绍了SPIKER-LL,一个专为SNN中的自适应局部学习设计的FPGA加速器,以最小的能耗实现了高精度。第二篇论文提出了一种脉冲递归单元的FPGA实现,展示了生物学合理性与硬件效率之间的平衡,结果显示具有竞争力的准确性和降低的能耗。 AI

影响 这些FPGA实现通过优化硬件上的脉冲神经网络,为边缘端更节能的AI提供了途径。

排序理由 两篇arXiv论文详细介绍了FPGA上脉冲神经网络的新型软硬件协同设计。

在 arXiv cs.NE (Neural & Evolutionary) 阅读 →

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FPGA加速器提升脉冲神经网络的能效

报道来源 [3]

  1. arXiv cs.LG TIER_1 English(EN) · Arthur Fyon, Julien Brandoit, Loris Mendolia, Damien Ernst, Jean-Michel Redout\'e, Guillaume Drion ·

    可扩展、高能效模拟循环计算的软硬件协同设计

    arXiv:2605.15216v3 Announce Type: replace-cross Abstract: Always-on AI applications, from environmental sensors to biomedical implants, require ultra-low power consumption. Analog circuits offer a path to sub-microwatt inference, yet existing analog implementations are limited to…

  2. arXiv cs.NE (Neural & Evolutionary) TIER_1 English(EN) · Stefano Di Carlo ·

    Spiker-LL:一种支持脉冲神经网络自适应本地学习的高能效 FPGA 加速器

    Deploying adaptive intelligence at the edge remains challenging due to the high computational and energy cost of training neural models. Spiking Neural Networks (SNNs) offer a promising alternative, but enabling on-device learning requires hardware-algorithm co-design. This paper…

  3. arXiv cs.NE (Neural & Evolutionary) TIER_1 English(EN) · Guillaume Drion ·

    FPGA上脉冲递归单元的能效实现

    Spiking Neural Networks (SNNs) can reduce energy consumption compared to conventional Artificial Neural Networks (ANNs) when spiking activity is sparse and the neuron model is hardware-friendly. However, biologically faithful models are often too costly to implement on FPGAs, whe…