English(EN) TAPCO-G: LLM-Guided Design-Adaptive Timing and Power Co-Optimization with Graph-Based Physical Priors

LLM引导的系统优化芯片设计时序与功耗

作者 PulseAugur 编辑部 · [1 个来源] · 2026-11-11 05:00

一篇新研究论文介绍了一个名为TAPCO-G的系统，该系统利用大型语言模型（LLMs）来指导芯片设计中时序和功耗的优化。与具有固定规则的传统优化器不同，TAPCO-G允许LLM根据设计特定的反馈来调整这些规则。该系统结合了LLM引导的自适应与基于图的物理先验知识来评估潜在的单元替换，从而提高时序和功耗效率。在测试中，TAPCO-G在MLCAD 2026竞赛基准上优于包括CERBERUS和TAPCO在内的现有方法。 AI

影响这种LLM引导的方法可以加速芯片设计周期并提高硬件效率。

排序理由详细介绍一种新的芯片设计优化方法的 ist 研究论文。 [lever_c_demoted from research: ic=1 ai=0.7]

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报道来源 [1]

arXiv cs.AI TIER_1 English(EN) · Wuqian Tang, Zixiao Wang, Che-Chien Lin, Fong-Hua Fu, Laura Ang\'elica Shion-Korsak, Xinyun Zhang, Bei Yu, Chun-Yao Wang · 2026-11-11 05:00

TAPCO-G：基于图的物理先验的 LLM 引导设计自适应时序与功耗协同优化

arXiv:2611.13931v1 Announce Type: cross Abstract: Post-placement timing and power co-optimization is critical to meeting setup timing targets and reducing power within placement constraints. A cell replacement can improve timing along one path while increasing power or reducing s…

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报道来源 [1]

TAPCO-G：基于图的物理先验的 LLM 引导设计自适应时序与功耗协同优化

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