LLMs automate FPGA accelerator design space exploration with SECDA-DSE framework

Researchers have developed SECDA-DSE, a new framework that leverages Large Language Models (LLMs) to automate the design space exploration of FPGA-based accelerators. This system integrates LLMs with existing SECDA tools to navigate the complex hardware design process, which typically requires significant manual effort and expertise. The framework uses retrieval-augmented generation and chain-of-thought prompting for reasoning-guided exploration, incorporating a feedback loop for continuous improvement. Initial evaluations on a Zynq-7000 FPGA demonstrated that the generated accelerator designs meet synthesis timing and resource constraints. AI

影响 Automates complex hardware design for AI workloads, potentially accelerating the development of specialized AI accelerators.

排序理由 This is a research paper detailing a new framework for hardware design automation. [lever_c_demoted from research: ic=1 ai=1.0]

在 arXiv cs.AI 阅读 →

• FPGA
• LLM
• SECDA
• SECDA-DSE
• Zynq-7000

• 论文
• 基础设施

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