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English(EN) Eco-SoC: A Sustainable VLSI Architecture for Energy-Proportional Artificial Intelligence

新型VLSI架构通过动态精度缩放实现可持续AI

作者 PulseAugur 编辑部 · [1 个来源] ·

研究人员开发了Eco-SoC，一种专为可持续人工智能设计的新型VLSI架构。该架构采用动态精度缩放逻辑（DPSL）框架，可动态调整位宽精度，在7nm FinFET工艺上将开关活动降低高达42%。除了传统指标外，生命周期评估表明，Eco-SoC的内含碳足迹在边缘部署的1.1年内即可抵消。此外，一种面向热量的电源门控机制将平均故障间隔时间（MTTF）延长一倍，解决了电子垃圾问题。 AI

影响 提出了一种硬件解决方案，以减少AI系统的环境影响并延长其使用寿命。

排序理由 该集群包含一篇详细介绍AI新硬件架构的学术论文。[lever_c_demoted from research: ic=1 ai=1.0]

在 arXiv cs.AI 阅读 →

AI 生成摘要 · Google Gemini · 来自 1 个来源。 我们如何撰写摘要 →

新型VLSI架构通过动态精度缩放实现可持续AI

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该集群包含一篇详细介绍AI新硬件架构的学术论文。[lever_c_demoted from research: ic=1 ai=1.0]
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报道来源 [1]

  1. arXiv cs.AI TIER_1 English(EN) · Jatin Chopra ·

    Eco-SoC：面向能源比例人工智能的可持续VLSI架构

    arXiv:2608.08761v1 Announce Type: cross Abstract: In an era defined by escalating climate change and the pervasive deployment of edge intelligence, the environmental cost of semiconductor manufacturing and operation has reached a critical threshold. As Deep Learning (DL) accelera…

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