English(EN)Hardware Design and Security in the Era of Chiplets and LLMs
大型语言模型集成到硬件设计和设备端应用中
作者PulseAugur 编辑部·[5 个来源]·
研究人员正在探索将大型语言模型(LLMs)集成到硬件设计和设备端应用中。一篇论文讨论了如何保护芯片小片系统和LLM驱动的电子设计自动化(EDA)流程免受硬件攻击。另一个框架RooflineBench旨在通过分析设备端LLM在资源受限硬件上的性能特征来进行基准测试。此外,还在进行实际实验,以测试消费级硬件上本地LLM的能力,评估它们在编码任务中的性能以及从二进制代码中识别处理器架构的能力。
AI
arXiv:2608.05063v1 Announce Type: cross Abstract: The semiconductor industry is undergoing a dual revolution: the shift toward heterogeneous 2.5D chiplet systems and the integration of Large Language Models (LLMs) into Electronic Design Automation (EDA) flows. While these paradig…
arXiv:2602.11506v4 Announce Type: replace-cross Abstract: The transition toward localized intelligence through Small Language Models (SLMs) has intensified the need for rigorous performance characterization on resource-constrained edge hardware. However, objectively measuring the…
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