据报道，谷歌即将推出的代号为Humufish的TPU将采用英特尔的EMIB-T封装技术，而不是行业标准的台积电CoWoS。这一举措意义重大，因为目前大多数AI训练加速器都依赖台积电的CoWoS。英特尔的EMIB-T通过将小型硅桥直接嵌入基板，避免了台积电大尺寸中介层的掩膜限制和浪费，从而在可扩展性和成本方面具有优势。 AI
影响 预示着AI硬件封装可能发生转变，提供可扩展性和成本效益，可能影响未来的AI加速器设计。
排序理由 AI加速器封装从行业标准发生重大转变。
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The risk. Plain EMIB has shipped in volume for years, but EMIB-T is new, and a power-delivering bridge is harder to manufacture at scale. The upside only lands if Intel can ramp yield and volume on schedule. If it slips, the fallback is the same capacity-constrained CoWoS this
Humufish is using EMIB-T. The "T" is TSV. Plain EMIB has no vias in the bridge, so power has to detour around it through the substrate, which strains power delivery. EMIB-T sends power vertically straight through the bridge, with added capacitors and a ground plane for cleaner
So why EMIB? 🟠 EMIB isn't bound by the interposer reticle limit. A CoWoS silicon interposer is printed by lithography, so it is capped by the reticle limit; the monolithic version (CoWoS-S) maxed near 3.3x, which is why TSMC moved to CoWoS-L. EMIB is not bound by the reticle htt…
Google's next TPU, codenamed Humufish, is set to use Intel's EMIB-T instead of TSMC CoWoS. Nearly every leading AI training accelerator today is packaged on a TSMC 2.5D flow, and almost all of it is CoWoS. CoWoS is the industry default, which is exactly why a flagship part https…