Intel patents XBM memory architecture to cut HBM costs for AI

By PulseAugur Editorial · [1 sources] · 2026-07-07 10:00

Intel has patented a new memory architecture called XBM, designed to overcome the limitations and high costs associated with current High Bandwidth Memory (HBM) technologies. This novel approach aims to reduce expenses by eliminating the need for a costly silicon interposer, instead utilizing a backend-transistor DRAM stack and serial UCIe links. The design also incorporates built-in repair mechanisms to improve yield and address the growing memory bottleneck in AI hardware. AI

IMPACT This new memory architecture could significantly reduce the cost of high-performance memory for AI accelerators, potentially accelerating their adoption and development.

RANK_REASON Patent application for a new memory architecture. [lever_c_demoted from research: ic=1 ai=0.7]

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Intel patents XBM memory architecture to cut HBM costs for AI

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Tom's Hardware TIER_1 English(EN) · Etiido Uko · 2026-07-07 10:00

Intel patent reveals new XBM memory architecture that ditches HBM's costly silicon interposer — backend-transistor DRAM stack uses UCIe links and built-in repair to ease AI's memory bottleneck

Intel’s XBM patent proposes an HBM alternative that uses backend-transistor DRAM, UCIe chiplet links, and repair logic to reduce packaging costs and complexity.

COVERAGE [1]

Intel patent reveals new XBM memory architecture that ditches HBM's costly silicon interposer — backend-transistor DRAM stack uses UCIe links and built-in repair to ease AI's memory bottleneck

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