English(EN) LevelSyn: Physical-Aware Logic Synthesis via Level-Asynchronous Graph Neural Networks

新框架LevelSyn使用GNN进行物理感知逻辑综合

作者 PulseAugur 编辑部 · [1 个来源] · 2026-09-04 04:00

研究人员开发了LevelSyn，一个将逻辑综合与集成电路物理设计相结合的新框架。它使用异步图神经网络（GNN）来预测门坐标并捕获与非图（AIGs）的结构语义。这种方法旨在通过提供比传统方法更精确的空间估计来降低功耗、提高性能并加速设计收敛。实验表明，在功耗降低、时序延迟和设计规则检查违规方面取得了显著的改进。 AI

影响这项研究通过将AI驱动的空间估计整合到综合过程中，有望加速集成电路设计周期并提高能效。

排序理由这是一篇研究论文，详细介绍了集成电路设计中逻辑综合的新方法。[lever_c_demoted from research: ic=1 ai=0.7]

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报道来源 [1]

arXiv cs.AI TIER_1 English(EN) · Jingyi Zhou, Zhengyuan Shi, Ziyang Zheng, Qiang Xu · 2026-09-04 04:00

LevelSyn：通过层异步图神经网络实现物理感知逻辑综合

arXiv:2609.03594v1 Announce Type: cross Abstract: As integrated circuit technology scales into the nanometer regime, the traditional disconnect between logic synthesis and physical design has led to significant PPA (Power, Performance, and Area) degradation and prolonged design c…

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报道来源 [1]

LevelSyn：通过层异步图神经网络实现物理感知逻辑综合

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