RISC-V
PulseAugur coverage of RISC-V — every cluster mentioning RISC-V across labs, papers, and developer communities, ranked by signal.
- developed by University of California, Berkeley 100%
- acquired by Tenstorrent 90%
- used by Qualcomm 70%
- acquired Qualcomm 70%
- used by Tenstorrent 70%
- uses Qualcomm 70%
- instance of central processing unit 70%
- used by system on a chip 70%
- competes with Arm Holdings 60%
- used by Arm Holdings 60%
- affiliated with Arm Holdings 50%
- invested by Qualcomm 50%
18 day(s) with sentiment data
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Spectre-like vulnerabilities found in RISC-V chips
Researchers have identified new vulnerabilities in some RISC-V chips, reminiscent of the original Spectre attacks. These findings indicate that certain implementations of the RISC-V architecture are susceptible to specu…
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MiCoPro framework enables efficient mixed-precision quantization for edge AI
Researchers have introduced MiCoPro, a novel framework designed for end-to-end co-design of mixed-precision quantization (MPQ) for edge AI applications. This framework addresses the limitations of existing methods by em…
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New RVANNS engine boosts approximate nearest neighbor search on RISC-V
Researchers have developed RVANNS, a new engine for approximate nearest neighbor search optimized for RISC-V processors. This system employs mixed-precision indexing and locality-aware graph traversal to enhance perform…
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Adversarial patterns evade surveillance cameras; Project Oberon runs on RISC-V
A security researcher has developed an algorithm capable of generating adversarial patterns that can evade detection by surveillance cameras. These patterns can obscure individuals, faces, and vehicles from automated mo…
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Researcher creates 'hall of shame' for slowest x86 CPU instructions
A hardware researcher named Christopher Domas has initiated a project to identify the slowest single x86 instruction, creating a leaderboard to rank these performance bottlenecks. The current top offender is the `fxrsto…
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MAUPITI enables on-device learning for low-power infrared sensors
Researchers have developed MAUPITI, a novel on-device learning system for low-resolution infrared sensors. This system utilizes a smart multi-pixel IR sensor with a RISC-V microcontroller, enabling pose and gesture reco…
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SmarCo HT Tech unveils RISC-V chip to cut AI video generation costs
SmarCo HT Tech has developed a new RISC-V dataflow chip designed to reduce the costs associated with AI video generation. This innovation aims to address the increasing demand and expense of creating AI-generated video …
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King Kong GC3: RISC-V video AI chip redefines compute rules
King Kong GC3, a novel RISC-V dataflow architecture chip, has been introduced as the world's first video-specific AI AIGC chip. It aims to address the inefficiencies of traditional CPU and GPU architectures in handling …
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LLM framework LACE accelerates RISC-V instruction extension development
Researchers have developed LACE, a novel framework that leverages large language models (LLMs) to streamline the creation and validation of domain-specific instruction set architecture extensions (ISAX) for RISC-V cores…
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KANs prove slower, costlier on embedded RISC-V than MLPs
A new research paper evaluates the deployment costs of Kolmogorov--Arnold Networks (KANs) compared to traditional Multilayer Perceptrons (MLPs) within hard-constrained recurrent physics-informed neural networks (HRPINNs…
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Reservoir Computing with Memristors Shows Promise for Branch Prediction
Researchers have developed a novel reservoir computing (RC) framework for branch prediction in pipelined processors, utilizing emerging CMOS memristor devices. This framework, implemented and simulated using System Veri…
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LLM-powered workflow streamlines RISC-V extension migration
Researchers have developed a novel two-phase workflow to address the challenge of non-compliant RISC-V extensions in CPU designs. This process leverages the RISC-V Unified Database (UDB) as a central source of truth and…
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AI reshapes chip design, favoring customizable RISC-V architectures
隼瞻 (Sunzhan) founder Zeng Yi believes that AI is fundamentally reshaping the chip design landscape, shifting architectural control from chip manufacturers to AI companies. This trend favors open architectures like RISC-…
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New framework enables on-device AI training with float16 on RISC-V
Researchers have developed an open-source framework enabling on-device training of AI models using float16 precision on resource-constrained RISC-V single-core processors. This approach, which leverages standard RISC-V …
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User leverages Claude AI to build RISC-V processor and board
A user has developed a project that leverages Claude to assist in the creation of a RISC-V processor, System on a Chip (SoC), and board. The project aims to simplify the typically complex semiconductor industry by provi…
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Beijing boosts AI computing power to fuel 'token economy' · 2 sources tracked
Beijing is significantly increasing its computing power to foster a "token economy" and advance its AI capabilities in a competitive landscape with the US. The city plans to add 50,000 petaflops of intelligent computing…
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Beijing plans "Token Factories" and 50K PetaFLOPS AI boost
Beijing is set to significantly boost its AI capabilities by constructing "Token Factories" and aiming to add 50,000 PetaFLOPS of intelligent computing power in the latter half of the year. This initiative is part of a …
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LLMs flip answers with irrelevant context despite stable accuracy scores · 2 sources tracked
New research from Georgia Tech and Stanford University reveals that large language models can exhibit instability in their predictions. While overall accuracy scores may remain high, individual answers can change signif…
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TSMC boosts Arizona AI chip hub investment to $265B amid surging demand
TSMC is significantly expanding its Arizona manufacturing campus with an additional $100 billion investment, bringing the total to $265 billion. This expansion is driven by the surging demand for AI infrastructure, part…
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RISC-V chip startup Zhichuangxin secures funding, partners with OpenHarmony
Zhichuangxin, a RISC-V chip startup founded by former Alibaba T-Head executives, has secured a new round of Pre-A funding from investors including Qidian Star Ventures and Shenkaihong. The company plans to strategically…