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ENTITY FinFET

FinFET

PulseAugur coverage of FinFET — every cluster mentioning FinFET across labs, papers, and developer communities, ranked by signal.

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Total · 30d
8
8 over 90d
Releases · 30d
0
0 over 90d
Papers · 30d
6
6 over 90d
TIER MIX · 90D
TOPICS
SENTIMENT · 30D

1 day(s) with sentiment data

RECENT · PAGE 1/1 · 8 TOTAL
  1. RESEARCH · CL_295538 ·

    GlobalFoundries unveils 7nm-class FD-SOI process for edge AI and automotive

    GlobalFoundries has announced its new 7nm-class FDX Fusion manufacturing node, marking a return to advanced fabrication after abandoning FinFET technology years prior. This new node utilizes planar transistors and FD-SO…

  2. TOOL · CL_245365 ·

    AI and LLMs integrated with TCAD for semiconductor design

    A new paper explores the integration of AI, including machine learning and large language models (LLMs), with Technology Computer-Aided Design (TCAD) for semiconductor device design and defect discovery. The research de…

  3. TOOL · CL_235559 ·

    New GAT Surrogate Accelerates FinFET Device Simulation

    Researchers have developed a novel physics-informed graph attention network (GAT) surrogate that operates directly on TCAD meshes to simulate FinFET device behavior. This approach predicts electrostatic potential and ca…

  4. RESEARCH · CL_223720 ·

    Intel's 14A process shows faster-than-expected defect reduction

    Intel's Chief Financial Officer, David Zinsner, reported significant progress on the company's upcoming 14A fabrication process. Defect density is decreasing faster than anticipated, a performance level Zinsner compared…

  5. TOOL · CL_169710 ·

    New hardware extension Ventaglio boosts Transformer inference speed

    Researchers have developed a novel hardware extension called Ventaglio, designed to significantly accelerate sparse tensor contractions on vector processors, a critical operation for Transformer model inference. This ex…

  6. TOOL · CL_131661 ·

    New Bit-Serial CNN Accelerator Boosts XR Vision Efficiency

    Researchers have developed BitFair, a novel bit-serial CNN accelerator designed for ultra-low-power Extended Reality (XR) applications. This accelerator incorporates learnable early termination and adaptive bit ordering…

  7. RESEARCH · CL_107853 ·

    Autoencoder framework enables rapid FinFET transistor modeling

    Researchers have developed a machine learning framework using an autoencoder to efficiently model FinFET transistors. This autoencoder compresses current-voltage (I-V) curves into a latent space, capturing essential dev…

  8. TOOL · CL_65551 ·

    AI framework accelerates GaN FinFET design, boosting efficiency

    Researchers have developed PALTO, a physics-informed active learning framework to optimize the design of Gallium Nitride (GaN) tri-gate FinFETs for vertical power delivery systems. This machine learning approach signifi…