JEDEC has introduced a new standard, SPHBM4, designed to reduce the cost of High Bandwidth Memory (HBM) used in AI processors. This standard utilizes a narrower 512-bit interface and allows for the use of less expensive organic substrates, bypassing the need for costly interposers and advanced packaging like TSMC's CoWoS. While maintaining HBM4 DRAM stacks, SPHBM4 achieves high data transfer rates by increasing the speed of its interface, enabling more cost-effective AI hardware. AI
IMPACT This new standard could lead to more affordable AI hardware by reducing the cost of high-bandwidth memory components.
RANK_REASON New industry standard released by JEDEC for AI memory. [lever_c_demoted from significant: ic=1 ai=0.7]
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