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New framework enhances fault tolerance in FPGA-based CNN accelerators

Researchers have developed ProWAFT, a novel fault-tolerance framework designed for CNN accelerators implemented on SRAM-based FPGAs. This system addresses the challenge of transient faults that can compromise reliability in edge computing environments. ProWAFT utilizes partial reconfiguration to dynamically apply Triple Modular Redundancy (TMR) across reconfigurable partitions, balancing workload criticality, fault propagation, and reconfiguration overhead to optimize latency, energy, and reliability. AI

IMPACT Enhances the reliability of AI inference hardware at the network edge, crucial for real-time applications.

RANK_REASON The item is an academic paper detailing a new technical framework for hardware accelerators. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.CL →

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New framework enhances fault tolerance in FPGA-based CNN accelerators

COVERAGE [1]

  1. arXiv cs.CL TIER_1 English(EN) · Xinxin Chen, Haoran Qiao, Yiming Guo, Kecheng Luo, Siyuan Feng, Jingwen Ma ·

    ProWAFT: A ROMA-LPD Instance for Workload-Aware and Dynamic Fault Tolerance in FPGA-Based CNN Accelerators

    arXiv:2607.01602v1 Announce Type: new Abstract: SRAM-based FPGAs provide an attractive platform for energy- and latency-constrained CNN inference at the network edge, yet transient faults can lead to silent errors that compromise reliability. Always-on redundancy (e.g., full TMR)…