field-programmable gate array
PulseAugur coverage of field-programmable gate array — every cluster mentioning field-programmable gate array across labs, papers, and developer communities, ranked by signal.
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Open-source SNN accelerator integrated into FPGA-based neuromorphic SoC
Researchers have developed a heterogeneous System-on-Chip (SoC) that integrates an open-source Recurrent Spiking Neural Network (SNN) accelerator called ReckOn. This design aims to bring efficient, low-power neuromorphi…
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PoTAcc pipeline accelerates power-of-two quantized DNNs on edge devices
Researchers have developed PoTAcc, an open-source pipeline designed to accelerate the deployment of power-of-two (PoT) quantized deep neural networks (DNNs) on resource-constrained edge devices. This system facilitates …
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LLMs automate FPGA accelerator design space exploration with SECDA-DSE framework
Researchers have developed SECDA-DSE, a new framework that leverages Large Language Models (LLMs) to automate the design space exploration of FPGA-based accelerators. This system integrates LLMs with existing SECDA tool…
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ViM-Q enables efficient Vision Mamba model inference on FPGAs
Researchers have developed ViM-Q, a novel algorithm-hardware co-design specifically for accelerating Vision Mamba (ViM) model inference on FPGAs. This approach tackles challenges in quantizing dynamic activation outlier…
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KANs enable ultrafast on-chip online learning for low-latency systems
Researchers have demonstrated ultrafast online learning capabilities using Kolmogorov-Arnold Networks (KANs) on Field-Programmable Gate Arrays (FPGAs). This approach achieves sub-microsecond adaptation times, outperform…
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SwiftChannel framework co-designs AI hardware for faster 5G channel estimation
Researchers have developed SwiftChannel, a novel algorithm-hardware co-design framework for deep learning-based 5G channel estimation. This framework integrates a hardware-friendly convolutional neural network with a de…
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Next-gen chips promise data centers greater efficiency and AI power
Next-generation chip designs, including those optimized for AI, energy efficiency, and heat tolerance, have the potential to significantly alter data center infrastructure. Innovations in packaging, memory, and offload …
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Resurrected Commodore 64 gets HDMI port for modern displays
A recreation of the original Commodore 64, dubbed the C64 Ultimate, has been updated with modern features. This new version includes an HDMI port for easy connection to contemporary displays. The creators utilized an FP…
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FPGA CNN enables on-device cardiac monitoring for astronauts
Researchers have developed an ultra-low-power Convolutional Neural Network (CNN) implemented on a Field-Programmable Gate Array (FPGA) for on-device cardiac feature extraction. This system is designed for smart health s…
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FPGA-based sigmoid function implementation achieves high accuracy with low hardware use
Researchers have developed a new hardware-efficient method for implementing the sigmoid activation function on FPGAs. This approach utilizes a mixed-radix CORDIC algorithm, combining radix-2 and radix-4 iterations for f…
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NVIDIA and Siemens Healthineers develop AI for adaptive ultrasound imaging
NVIDIA and Siemens Healthineers have developed a new AI model called NV-Raw2Insights-US that processes raw ultrasound data directly, rather than relying on traditional image reconstruction methods. This approach allows …
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IT coders shift focus to MCUs, FPGAs, and ASICs to reduce AI system power consumption.
IT professionals, previously focused on high-level programming languages like JavaScript and Python, are now showing increased interest in hardware-level computing concepts such as microcontrollers (MCU), field-programm…
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New HGQ-LUT and da4ml methods speed up DNN training and FPGA deployment
Researchers have developed HGQ-LUT, a new method for training lookup-table (LUT) based neural networks that significantly speeds up the training process, making it over 100 times faster on modern GPUs. This approach int…
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ImageHD accelerator boosts on-device continual learning with Hyperdimensional Computing
Researchers have developed ImageHD, a novel FPGA accelerator designed for energy-efficient on-device continual learning of visual representations using Hyperdimensional Computing (HDC). This system addresses the limitat…