Fully Ternary Vision Transformer Achieves High Compression for Microcontrollers

Researchers have developed FTerViT, a fully ternary Vision Transformer that compresses all weight matrices and normalization parameters. This approach significantly reduces the model's memory footprint, making it more feasible for deployment on resource-constrained devices like microcontrollers. FTerViT achieves competitive accuracy on ImageNet while offering substantial compression compared to standard floating-point models. AI

影响 Enables more efficient deployment of advanced vision models on low-power edge devices.

排序理由 The cluster contains an academic paper detailing a new model architecture and its performance on benchmarks. [lever_c_demoted from research: ic=1 ai=1.0]

在 arXiv cs.CV 阅读 →

• DeiT-III-S
• ESP32-S3
• FTerViT
• ImageNet
• Vision Transformer

• 论文
• 基础设施

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