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English(EN) A developer has compiled a SIMT GPU directly into the weights of Qwen3.5-2B, so the model runs real CUDA kernels inside its own forward passes. The 45 added lay

开发者将GPU嵌入LLM权重以运行CUDA内核

作者 PulseAugur 编辑部 · [2 个来源] ·

一位开发者创建了qwenGPU，这是一个实验性模型，它将SIMT GPU直接集成到Qwen3.5-2B的权重中。这种新颖的方法允许模型在其自身的前向传播中执行真实的CUDA内核，并使用Qwen现有的Gated DeltaNet和SwiGLU块构建了45个额外的未训练层。开发者报告称，与基础模型相比，文本漂移极小，并声称准确率很高，该模型在多个内核上与真实的NVIDIA Tesla T4相匹配。 AI

影响 这项研究可能带来更高效和集成的AI软硬件协同设计，并可能影响未来AI模型的训练和部署方式。

排序理由 该条目描述了一种将GPU计算直接集成到LLM权重中的新颖研究方法，而不是正式的产品发布或前沿模型公告。

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开发者将GPU嵌入LLM权重以运行CUDA内核

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该条目描述了一种将GPU计算直接集成到LLM权重中的新颖研究方法，而不是正式的产品发布或前沿模型公告。
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报道来源 [2]

  1. MarkTechPost TIER_1 English(EN) · Michal Sutter ·

    Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA

    <p>qwenGPU compiles a 4-lane SIMT GPU into Qwen3.5-2B as 45 untrained layers. The model writes every step of real CUDA launches itself, using Gated DeltaNet state as registers and memory.</p> <p>The post <a href="https://www.marktechpost.com/2026/11/01/qwengpu-simt-gpu-compiled-i…

  2. Mastodon — mastodon.social TIER_1 English(EN) · [email protected] ·

    A developer has compiled a SIMT GPU directly into the weights of Qwen3.5-2B, so the model runs real CUDA kernels inside its own forward passes. The 45 added lay

    A developer has compiled a SIMT GPU directly into the weights of Qwen3.5-2B, so the model runs real CUDA kernels inside its own forward passes. The 45 added layers are untrained and built from Qwen's own Gated DeltaNet and SwiGLU blocks, and text drift from the base model stays t…

    链接 marktechpost.com/…/qwengpu-simt-gpu-compi…

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