TSMC's senior vice president Kevin Zhang stated that panel-level packaging technologies will not replace their current wafer-level packaging solutions like CoWoS in the near future for large AI processors. While panel packaging offers the potential for significantly larger chip packages, wafer-level technologies, such as CoWoS, are currently more advanced and offer superior interconnection densities. TSMC is continuing to develop CoWoS, which still has considerable room for scaling and integration, and is also exploring panel-based processes like CoPoS as a complementary option rather than a replacement. AI
IMPACT Confirms that advanced wafer-level packaging like CoWoS will remain critical for large AI processors in the near term, influencing hardware development roadmaps.
RANK_REASON The cluster consists of news reports discussing statements made by a TSMC executive about future packaging technologies, rather than a direct announcement of a new product or research.
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