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TSMC: Panel Packaging Won't Replace CoWoS for Advanced AI Chips Soon

TSMC's senior vice president Kevin Zhang stated that panel-level packaging technologies will not replace their current wafer-level packaging solutions like CoWoS for advanced AI processors in the near future. While panel packaging offers the potential for significantly larger chip packages, wafer-level technologies like CoWoS provide superior interconnection densities and leverage more advanced manufacturing tools. TSMC sees room for further scaling with CoWoS, capable of integrating up to 58 large dies, and views panel-based packaging as a complementary option rather than a direct replacement. AI

IMPACT Confirms that current advanced packaging technologies like CoWoS will remain critical for large AI processors, influencing near-term hardware development.

RANK_REASON This is a commentary on existing technology roadmaps from a company executive, not a new release or research.

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TSMC: Panel Packaging Won't Replace CoWoS for Advanced AI Chips Soon

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  1. Tom's Hardware TIER_1 English(EN) · Anton Shilov ·

    TSMC says panel packaging won't replace CoWoS anytime soon for the largest future AI processors — wafer-level tech can scale to 58 massive dies in one package

    TSMC is exploring panel-level packaging and is working on its CoPoS technology, but the company's Kevin Zhang says wafer-level packaging technologies is considerably more advanced than panel-level packaging.