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FPGA-based sigmoid function implementation achieves high accuracy with low hardware use

By PulseAugur Editorial · [1 sources] ·

Researchers have developed a new hardware-efficient method for implementing the sigmoid activation function on FPGAs. This approach utilizes a mixed-radix CORDIC algorithm, combining radix-2 and radix-4 iterations for faster convergence and reduced hardware overhead. The implementation on a Xilinx Virtex-7 FPGA achieved a low logic slice count and minimal DSP usage, demonstrating a mean absolute error competitive with existing sigmoid implementations. AI

IMPACT Offers a more efficient hardware implementation for deploying neural networks on resource-constrained edge devices.

RANK_REASON Academic paper detailing a novel hardware implementation of a common neural network activation function.

Read on arXiv cs.AI →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

FPGA-based sigmoid function implementation achieves high accuracy with low hardware use

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Academic paper detailing a novel hardware implementation of a common neural network activation function.
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COVERAGE [1]

  1. arXiv cs.AI TIER_1 English(EN) · Chintan Panchal, Ankur Changela, Mohendra Roy ·

    Hardware-Efficient FPGA Implementation of Sigmoid Function Using Mixed-Radix Hyperbolic Rotation CORDIC

    arXiv:2604.23547v1 Announce Type: cross Abstract: Efficient hardware implementation of nonlinear activation functions is a crucial task in deploying artificial neural networks on resource-constrained and edge devices such as Field-Programmable Gate Arrays (FPGAs). The sigmoid act…

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