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DCGAN runs on RISC-V microcontroller with 512KB SRAM

A project successfully implemented a 12.6 million parameter DCGAN model for generating 64x64 cat faces on a dual-core RISC-V microcontroller with only 512KB of SRAM. The inference engine, written entirely in C, achieved image generation in 26 seconds, with performance primarily limited by SD card access speed rather than computational power. This work is notable as it bypasses existing ecosystems like TFLite and CMSIS NN, offering a novel solution for running generative models on low-cost embedded hardware. AI

IMPACT Enables generative AI capabilities on low-power, resource-constrained embedded devices.

RANK_REASON The cluster describes a novel implementation of a generative model on constrained hardware, detailed in a paper, fitting the research category. [lever_c_demoted from research: ic=1 ai=1.0]

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DCGAN runs on RISC-V microcontroller with 512KB SRAM

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The cluster describes a novel implementation of a generative model on constrained hardware, detailed in a paper, fitting the research category. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. r/MachineLearning TIER_1 English(EN) · /u/Separate-Choice ·

    DCGAN inference on a microcontroller: 12.6M parameters, 512KB SRAM, 26-second generation, pure C [P]

    <!-- SC_OFF --><div class="md"><p>Just thought I'd share, I ran a DCGAN on a dual core RISC-V microcontroller, the CH32H417 generating 64x64 cat faces. This is a new RISC-V MCU, so no TFLite, no CMSIS NN and no external memory. It's a pure C inference engine, bit-identical to PyT…