Researchers have developed SLICE-CiM, a novel control engine for SRAM-based compute-in-memory (CIM) macros designed to enhance energy efficiency in CNN inference. The system incorporates four peripheral blocks, including a Confidence-Based Early-Exit module, to minimize power consumption and optimize performance. Implemented in TSMC 65-nm CMOS, SLICE-CiM demonstrates significant efficiency gains, achieving up to 454.91 TOPS/W on MobileNetV2 without requiring modifications to bitcells or retraining. AI
IMPACT This new compute-in-memory architecture significantly improves energy efficiency for AI inference tasks, potentially enabling more powerful AI capabilities on edge devices.
RANK_REASON The item is a research paper detailing a new hardware architecture for AI inference. [lever_c_demoted from research: ic=1 ai=1.0]
Read on arXiv cs.NE (Neural & Evolutionary) →
- CIFAR-100
- CMOS
- CNN
- Confidence-Based Early-Exit (EE)
- MobileNetV2
- Mohd Faisal Khan
- SLICE-CiM
- SRAM
- TSMC
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