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New compute-in-memory engine boosts CNN inference efficiency

Researchers have developed SLICE-CiM, a novel control engine for SRAM-based compute-in-memory (CIM) macros designed to enhance energy efficiency in CNN inference. The system incorporates four peripheral blocks, including a Confidence-Based Early-Exit module, to minimize power consumption and optimize performance. Implemented in TSMC 65-nm CMOS, SLICE-CiM demonstrates significant efficiency gains, achieving up to 454.91 TOPS/W on MobileNetV2 without requiring modifications to bitcells or retraining. AI

IMPACT This new compute-in-memory architecture significantly improves energy efficiency for AI inference tasks, potentially enabling more powerful AI capabilities on edge devices.

RANK_REASON The item is a research paper detailing a new hardware architecture for AI inference. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.NE (Neural & Evolutionary) →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

New compute-in-memory engine boosts CNN inference efficiency

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The item is a research paper detailing a new hardware architecture for AI inference. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. arXiv cs.NE (Neural & Evolutionary) TIER_1 English(EN) · Santosh Kumar Vishvakarma ·

    SLICE-CiM: Selective Layer-wise Inference Control Engine with Confidence-Based Early Exit for SRAM based Digital Compute-in-Memory

    Digital SRAM compute-in-memory (CIM) macros enable energy-efficient CNN inference by eliminating off-chip weight transfers; however, peripheral control logic introduces three inefficiencies: bit- slice over-activation at reduced precision (L1), unnecessary accumula- tion depth (L…