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Survey maps reinforcement learning implementations on FPGAs and ICs

This survey paper reviews over 100 studies on the implementation of reinforcement learning (RL) algorithms on field-programmable gate arrays (FPGAs) and integrated circuits (ICs). It categorizes research by RL algorithm family, hardware realization strategy, and application domain, offering a unified analysis of how RL maps onto reconfigurable and fixed hardware. The paper examines architectural patterns, practical limitations, and future research directions for efficient RL-driven hardware systems, providing a consolidated reference for researchers. AI

IMPACT Provides a consolidated reference for researchers developing and evaluating RL solutions on specialized hardware.

RANK_REASON The item is a survey paper published on arXiv in the cs.LG category. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.LG →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

Survey maps reinforcement learning implementations on FPGAs and ICs

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The item is a survey paper published on arXiv in the cs.LG category. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. arXiv cs.LG TIER_1 English(EN) · Hamza Kheddar ·

    Reinforcement learning for hardware acceleration and system-level optimization on FPGA and integrated-circuit platforms: A survey

    arXiv:2610.28699v1 Announce Type: new Abstract: Reinforcement learning (RL) enables adaptive and autonomous decision-making in embedded, edge, and heterogeneous computing systems. Field-programmable gate arrays (FPGAs) and integrated circuits (ICs) offer low latency, energy effic…