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d-Matrix unveils 3D DRAM AI accelerator with 100 TB/s bandwidth

By PulseAugur Editorial · [1 sources] ·

d-Matrix has unveiled its Raptor AI accelerator, which features a novel 3D stacking architecture. This design places a TSMC 4nm compute die directly on top of a custom-designed DRAM die, achieving an unprecedented 100 TB/s of bandwidth per card. The company claims this approach significantly reduces energy consumption for data transfer compared to traditional HBM-based designs and projects substantially higher throughput for generative inference tasks. AI

IMPACT This novel 3D stacking approach could significantly boost AI inference performance and efficiency, potentially lowering costs and enabling more powerful on-device AI.

RANK_REASON New hardware architecture for AI accelerators with significant performance claims. [lever_c_demoted from significant: ic=1 ai=0.7]

Read on Tom's Hardware →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

d-Matrix unveils 3D DRAM AI accelerator with 100 TB/s bandwidth

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Signal score
46 / 100
Composite score across the factors below. Higher = stronger signal that this story matters right now.
Newsworthiness bucket
Research
New hardware architecture for AI accelerators with significant performance claims. [lever_c_demoted from significant: ic=1 ai=0.7]
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Only one publisher covered this so far. Single-source stories can still rank when the publisher is high-authority, but they lack cross-source corroboration.
Topics
infra, model release
Editorial topic classification. Feeds into how the story surfaces on /topic/<slug> hub pages and into the per-entity coverage mix.
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High
Clearly on-topic for AI-industry coverage.
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Breaking (< 6h)
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Full methodology in our editorial standards.

COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Luke James ·

    Hot Chips 2026: d-Matrix stacks AI accelerator directly on custom DRAM for 100 TB/s per card — TSMC 4nm compute die bonded face-to-face at a 36-micron pitch on top of a custom-designed die

    d-Matrix presented Raptor, which it calls the first 3D DRAM accelerator for generative inference, showing a TSMC 4nm compute die bonded face-to-face at a 36-micron pitch on top of a custom-designed DRAM die.

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