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Alibaba's XuanTie C950 RISC-V chip runs Qwen-3.8 LLM natively

By PulseAugur Editorial · [2 sources] ·

Alibaba has successfully integrated its XuanTie C950 RISC-V chip, manufactured by TSMC using a 5nm process, with its Qwen-3.8 27B large language model. This integration allows the model to run natively on the chip, achieving a performance of 30 tokens per second. This development signifies a significant step towards vertical integration for Alibaba in the AI hardware and software space, potentially reducing reliance on traditional GPU architectures. AI

IMPACT Demonstrates potential for RISC-V architecture in running LLMs, reducing reliance on GPUs and enabling greater hardware-software integration.

RANK_REASON Research milestone involving a novel chip architecture running a large language model natively.

Read on r/LocalLLaMA →

AI-generated summary · Google Gemini · from 2 sources. How we write summaries →

Alibaba's XuanTie C950 RISC-V chip runs Qwen-3.8 LLM natively

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Signal score
0 / 100
Composite score across the factors below. Higher = stronger signal that this story matters right now.
Newsworthiness bucket
Research
Research milestone involving a novel chip architecture running a large language model natively.
Source corroboration
2 independent sources
Multiple independent publishers reporting the same story raises confidence that it's real and newsworthy.
Topics
model release, infra
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AI-industry relevance
High
Clearly on-topic for AI-industry coverage.
Story freshness
76 days old
Aged out of breaking-news scoring windows; ranking reflects the durable signal from the full source set.

Full methodology in our editorial standards.

COVERAGE [2]

  1. Mastodon — fosstodon.org TIER_1 English(EN) · [email protected] ·

    Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds https://wccftech.com/

    Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds https://wccftech.com/alibabas-tsmc-built-5nm-risc-v-chip-xuantie-c950-now-runs-qwen-3-8-27b-model-natively-unlocking-massive-vertical-integra…

    LINKS wccftech.com/alibabas-tsmc-built-5nm-risc…
  2. r/LocalLLaMA TIER_1 (CA) · /u/DeltaSqueezer ·

    Alibaba's RISC-V CPU, XuanTie C950, Runs Qwen-3.8 27B at 30 tps

    <table> <tr><td> <a href="https://www.reddit.com/r/LocalLLaMA/comments/1vs0wsl/alibabas_riscv_cpu_xuantie_c950_runs_qwen38_27b/"> <img alt="Alibaba's RISC-V CPU, XuanTie C950, Runs Qwen-3.8 27B at 30 tps" src="https://external-preview.redd.it/GbBzuE6CtmuYsp0wg607iWjhYOFzTGo8N_b2f…

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