New framework HLSmith streamlines FPGA accelerator creation using expert-guided LLMs

Researchers have developed HLSmith, a novel framework designed to assist in the creation of specialized FPGA accelerators from C/C++ code. This system leverages an expertise library encoding hardware optimization techniques and a staged orchestration flow that mimics expert development practices. HLSmith aims to overcome the limitations of current LLMs in hardware design by providing guided translation and optimization, significantly improving the success rate and performance of generated accelerators compared to previous methods. AI

IMPACT This framework could significantly reduce the time and expertise required to develop custom FPGA accelerators, potentially accelerating hardware innovation.

RANK_REASON The cluster contains an academic paper detailing a new framework for hardware acceleration. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.AI →

• arXiv
• C Cpp Programming Languages
• ChatHLS
• field-programmable gate array
• HLSmith
• PolyBench

• paper
• infra

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →