Reservoir Computing with Memristors Shows Promise for Branch Prediction

Researchers have developed a novel reservoir computing (RC) framework for branch prediction in pipelined processors, utilizing emerging CMOS memristor devices. This framework, implemented and simulated using System Verilog and Verilog-AMS, shows promise for high-speed operation and integration with digital logic. While the RC design demonstrates impressive prediction accuracy on the Dhrystone benchmark for the RISC-V RV64GC ISA, it is significantly slower to adapt to changes in branching behavior compared to the state-of-the-art TAGE predictor. AI

IMPACT This research explores novel hardware implementations for AI-like computation, potentially impacting future processor designs for AI workloads.

RANK_REASON The cluster contains a single academic paper detailing a novel technical approach. [lever_c_demoted from research: ic=1 ai=0.7]

Read on arXiv cs.LG →

• CMOS
• Dhrystone
• memristor
• RISC-V
• RV64GC
• System Verilog
• Tage
• Verilog-AMS

• paper
• infra

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