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Qualcomm unveils near-memory AI architecture to boost performance

By PulseAugur Editorial · [1 sources] ·

Qualcomm has introduced a new near-memory AI architecture called High Bandwidth Compute (HBC) designed to overcome the memory wall limitations in AI workloads. This architecture places AI accelerators directly beneath LPDDR DRAM stacks, offering significantly higher bandwidth-per-watt and capacity compared to traditional High Bandwidth Memory (HBM) and on-chip SRAM. Qualcomm's approach aims to reduce power consumption, heat, and the cost associated with advanced packaging, with future accelerators like the AI250 and AI350 set to leverage this new technology for substantial performance gains. AI

IMPACT This new architecture could significantly improve AI workload performance and efficiency, potentially lowering costs and power consumption for AI deployments.

RANK_REASON Qualcomm's announcement of a new AI architecture and accelerators represents a significant development in AI hardware infrastructure. [lever_c_demoted from significant: ic=1 ai=0.7]

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AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

Qualcomm unveils near-memory AI architecture to boost performance

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Qualcomm's announcement of a new AI architecture and accelerators represents a significant development in AI hardware infrastructure. [lever_c_demoted from significant: ic=1 ai=0.7]
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COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Anton Shilov ·

    Qualcomm reveals HBC near-memory AI architecture, AI250 and AI350 accelerators — touts 6x higher bandwidth-per-watt compared to HBM, 200x capacity compared to on-chip SRAM

    Qualcomm unveils HBC near-memory AI architecture, claims it has broken the memory wall.

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