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Industry giants integrate 2D transistors at 50nm pitch, nearing post-silicon era

Industry leaders imec, ASML, and TSMC have successfully fabricated complementary 2D-material transistors at a 50nm pitch on a 300mm wafer, a significant step towards the post-silicon era. This breakthrough technology, presented at the IEEE/JSAP Symposium on VLSI Technology and Circuits, utilizes a single extreme ultraviolet (EUV) lithography exposure to create channels as short as 28nm. The integrated transistors demonstrated a high on/off current ratio and near-perfect switching behavior, with n-channel devices using molybdenum disulfide and p-channel devices using tungsten diselenide or disulfide. This achievement overcomes previous scaling bottlenecks by inverting the traditional transistor fabrication process, placing metal contacts beneath the 2D channel. AI

IMPACT This advancement in transistor technology could enable more powerful and efficient AI hardware in the future.

RANK_REASON This cluster reports on a significant technological advancement in semiconductor manufacturing, involving major industry players and a breakthrough in transistor scaling. [lever_c_demoted from significant: ic=1 ai=0.7]

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Industry giants integrate 2D transistors at 50nm pitch, nearing post-silicon era

COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Luke James ·

    Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer

    Imec, ASML, and TSMC have integrated both n-type and p-type transistors with atomically thin 2D channels on a single 300mm wafer.