ENTITY
RV32IM
RV32IM
PulseAugur coverage of RV32IM — every cluster mentioning RV32IM across labs, papers, and developer communities, ranked by signal.
Total · 30d
2
2 over 90d
Releases · 30d
0
0 over 90d
Papers · 30d
2
2 over 90d
TIER MIX · 90D
TOPICS
SENTIMENT · 30D
1 day(s) with sentiment data
RECENT · PAGE 1/1 · 2 TOTAL
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New RISC-V processor boosts Tsetlin Machine edge AI efficiency
Researchers have developed a specialized RISC-V processor designed for efficient Tsetlin Machine (TM) inference at the edge. This new architecture reduces the instruction set to optimize for TM's logic-based operations,…
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AI research loop optimizes CPU architecture, boosting performance by 92%
An autonomous research loop, inspired by Andrej Karpathy's work, was adapted to optimize a CPU's microarchitecture. The system proposed, implemented, and evaluated hypotheses for a SystemVerilog CPU core, achieving sign…