PulseAugur
EN
LIVE 00:47:25
ENTITY divagr1925/Qwen3.5-4B-Qwenputer

divagr1925/Qwen3.5-4B-Qwenputer

PulseAugur coverage of divagr1925/Qwen3.5-4B-Qwenputer — every cluster mentioning divagr1925/Qwen3.5-4B-Qwenputer across labs, papers, and developer communities, ranked by signal.

Show in brief
Total · 30d
1
1 over 90d
Releases · 30d
0
0 over 90d
Papers · 30d
0
0 over 90d
TIER MIX · 90D
TOPICS
SENTIMENT · 30D

1 day(s) with sentiment data

RECENT · PAGE 1/1 · 1 TOTAL
  1. RESEARCH · CL_331577 ·

    Qwenputer model integrates RISC-V CPU directly into language model weights

    A new experimental model called Qwenputer has been released, integrating a 32-bit RISC-V CPU directly into its weights. This model, based on Qwen3.5-4B, uses its own Gated DeltaNet state as RAM, allowing the CPU to run …