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Google unveils TPUv8t and Virgo network architecture

Google has introduced its new TPUv8t, a training-focused accelerator, alongside a novel network architecture named Virgo. This new system boasts a significant generational leap, offering up to four times the bandwidth per accelerator and a 40% reduction in latency compared to its predecessors. Virgo is designed to interconnect a massive 134,400 chips, supporting a total non-blocking bandwidth of 47 petabits per second. AI

IMPACT This advancement in TPU and network architecture could significantly boost AI training efficiency and scale for Google's internal workloads and cloud offerings.

RANK_REASON This cluster details a new hardware product release and a significant infrastructure announcement from a major tech company.

Read on X — SemiAnalysis →

AI-generated summary · Google Gemini · from 4 sources. How we write summaries →

Google unveils TPUv8t and Virgo network architecture

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This cluster details a new hardware product release and a significant infrastructure announcement from a major tech company.
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infra, model release
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COVERAGE [4]

  1. X — SemiAnalysis TIER_1 English(EN) · SemiAnalysis_ ·

    To learn more, please check our networking model:

    To learn more, please check our networking model: https://t.co/kqt0IiSiFi (4/4)

  2. X — SemiAnalysis TIER_1 English(EN) · SemiAnalysis_ ·

    Within the plane, each switch is connected in full mesh using 800G 2xFR4 OSFPs in 8x100G breakout mode on the L1 layer and 400G FR4 QSFPs in 4x100G breakout mod

    Within the plane, each switch is connected in full mesh using 800G 2xFR4 OSFPs in 8x100G breakout mode on the L1 layer and 400G FR4 QSFPs in 4x100G breakout mode on the L2 layer. To maintain a non-blocking topology, Google is doubling some links between the L1 and the L2 layers.

  3. X — SemiAnalysis TIER_1 English(EN) · SemiAnalysis_ ·

    This marks a generational leap with up to 4x the bandwidth per accelerator and a 40% lower latency compared to previous generation. On a network perspective, th

    This marks a generational leap with up to 4x the bandwidth per accelerator and a 40% lower latency compared to previous generation. On a network perspective, this architecture connects 14 TPU pods (9,600 interconnected TPUs each, via 3D Torus ICI) on a flat 2-layers topology, htt…

  4. X — SemiAnalysis TIER_1 English(EN) · SemiAnalysis_ ·

    With the introduction of the TPUv8t, their new training focused TPU, Google unveiled a new scale-out network architecture called Virgo. Virgo is able to interco

    With the introduction of the TPUv8t, their new training focused TPU, Google unveiled a new scale-out network architecture called Virgo. Virgo is able to interconnect up to 134,400 chips with up to 47 Pbps of non-blocking bi-sectional bandwidth. (1/4)🧵 https://t.co/J4TCJ70BFP