New method improves PCB defect detection with scale-aware tiling

By PulseAugur Editorial · [1 sources] · 2026-05-26 04:00

Researchers have developed a new method for detecting defects on high-resolution printed circuit boards (PCBs) that addresses issues with scale and tile boundaries. Their approach involves training detectors on tile crops rather than full-board images to preserve detail, significantly improving detection accuracy. Additionally, a post-processing technique called Topology-Aware Tile Merging (TA-TM) was introduced to reconcile detections across tile edges, enhancing recall for small defects and overall performance without requiring retraining. AI

IMPACT This research offers a novel approach to improve automated visual inspection in manufacturing, potentially leading to more reliable quality control for electronic components.

RANK_REASON This is a research paper detailing a new method for a specific technical problem. [lever_c_demoted from research: ic=1 ai=1.0]

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arXiv cs.CV TIER_1 English(EN) · Mohammad Alijanpour Shalmani, Alale Rezvani Boroujeni, Ali Amini, Jiann Shiun Yuan · 2026-05-26 04:00

From Full Boards to Tiny Defects: Scale-Aware Tile Inference with Topology-Aware Merging for High-Resolution PCB Defect Detection

arXiv:2605.24726v1 Announce Type: new Abstract: High-resolution printed circuit board (PCB) inspection suffers from resolution collapse when full-board images are resized to standard detector inputs: micro-scale defects shrink to a few pixels and are missed. Tile-based inference …

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From Full Boards to Tiny Defects: Scale-Aware Tile Inference with Topology-Aware Merging for High-Resolution PCB Defect Detection

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