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New technique combats hardware aging in AI multipliers

Researchers have developed a new technique to combat hardware aging in arithmetic multipliers, which are crucial components in AI accelerators. The method utilizes the sign-invariance property of multiplication, applying 2s complement transformations to inputs to redistribute transistor stress and mitigate Negative Bias Temperature Instability (NBTI) aging. This approach was integrated into systolic arrays, demonstrating improved lifetime with minimal overhead in area and delay. AI

IMPACT Enhances the longevity and reliability of hardware critical for AI computations, potentially reducing maintenance costs and improving performance stability.

RANK_REASON The cluster contains an academic paper detailing a novel technique for hardware reliability. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.AI →

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New technique combats hardware aging in AI multipliers

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The cluster contains an academic paper detailing a novel technique for hardware reliability. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. arXiv cs.AI TIER_1 English(EN) · Biresh Kumar Joardar ·

    Building Reliable Arithmetic Multipliers Under NBTI Aging and Process Variations

    Hardware aging poses a significant challenge for integrated circuits (ICs), leading to performance degradation and eventual failure. In this work, we focus on the aging of arithmetic multipliers, which are a cornerstone of modern computing systems including in CPUs, GPUs, and FPG…