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AMD brings back 3D V-Cache to data centers with faster Venice-X EPYC chips

By PulseAugur Editorial · [1 sources] ·

AMD is reintroducing its 3D V-Cache technology to the data center with the upcoming Venice-X EPYC processors, marking its return after a four-year absence. These new chips aim to enhance High-Performance Computing (HPC) workloads by combining high clock speeds of up to 5.3 GHz with a substantial L3 cache, a significant improvement over previous generations. The Venice-X processors will also feature PCIe 6.0 and an impressive memory bandwidth of 1.6 TB/s, utilizing the SP7 socket and a 16-channel memory setup. AI

IMPACT Enhances HPC capabilities, potentially accelerating AI model training and inference through increased cache and memory bandwidth.

RANK_REASON New product release from a major semiconductor manufacturer targeting data center and HPC workloads. [lever_c_demoted from significant: ic=1 ai=0.7]

Read on Tom's Hardware →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

AMD brings back 3D V-Cache to data centers with faster Venice-X EPYC chips

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33 / 100
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Research
New product release from a major semiconductor manufacturer targeting data center and HPC workloads. [lever_c_demoted from significant: ic=1 ai=0.7]
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product, infra
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High
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Breaking (< 6h)
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COVERAGE [1]

  1. Tom's Hardware TIER_1 English(EN) · Jake Roach ·

    AMD’s Venice-X maxes out family at 5.3 GHz, returning 3D V-Cache to data center after four years

    AMD's Venice-X CPUs launch in the second half of 2027, bringing 3D V-Cache back to the data center after four years on the sidelines.

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