Neural networks speed up transistor modeling for chip design

Researchers have developed neural network (NN)-based transistor models that significantly accelerate SPICE simulations for chip design. These models accurately predict drain current and charges for a 3nm nanosheet, demonstrating their viability as an alternative to industry-standard BSIM-CMG models. The NN-based approach achieved up to 8 times faster standard cell library characterization with sub-0.11% error for delay and 0.76% for total power evaluation across various circuits. AI

IMPACT Accelerates chip design simulations, potentially reducing time-to-market for new hardware.

RANK_REASON Academic paper detailing a new methodology for transistor modeling. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.LG →

• 3nm nanosheet
• BSIM-CMG
• DagsHub
• Hugging Face
• NN-Based Transistor Models
• Spice
• Verilog-A

• paper
• infra

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