Researchers have developed SyntheticHLS, a framework designed to generate diverse and large-scale synthetic datasets for high-level synthesis (HLS) in semiconductor design using large language models (LLMs). This framework addresses the scarcity of HLS designs compared to hardware description languages (HDLs) and aims to improve the generalization of deep learning models by generating code with varied lengths, hierarchies, design-space sizes, and application domains. The system employs an iterative feedback-guided mutation loop and quantitative complexity metrics to create more scalable and complex designs, which have shown better transferability to benchmark test sets than zero-shot generated designs. AI
IMPACT This framework could accelerate the development of specialized hardware by providing better training data for AI models used in chip design.
RANK_REASON The cluster contains a research paper detailing a new framework and dataset for HLS generation using LLMs. [lever_c_demoted from research: ic=1 ai=1.0]
- arXiv
- Deep learning
- High-level synthesis
- Hugging Face
- Large language models
- Semiconductor design
- SyntheticHLS
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