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MI455 Chip Debuts Active Interconnect Bridges in CoWoS-L Package

By PulseAugur Editorial · [1 sources] ·

The MI455 chip is reportedly the first to incorporate active Local Silicon Interconnect (LSI) bridges within its CoWoS-L package. Unlike previous passive bridges, these active LSIs contain circuitry that regenerates signals, potentially allowing for smaller PHYs and more silicon for compute and memory. This advancement, demonstrated by TSMC, appears to be a shipping product rather than a research vehicle, featuring two base dies, twelve HBM4 stacks, and two IO dies. AI

IMPACT Enables more efficient chiplet integration, potentially leading to more powerful and specialized AI hardware.

RANK_REASON This item details a significant advancement in chip packaging technology with the introduction of active interconnect bridges, a novel feature for the CoWoS-L package. [lever_c_demoted from significant: ic=1 ai=0.7]

Read on X — SemiAnalysis →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

MI455 Chip Debuts Active Interconnect Bridges in CoWoS-L Package

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This item details a significant advancement in chip packaging technology with the introduction of active interconnect bridges, a novel feature for the CoWoS-L package. [lever_c_demoted from signifi…
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COVERAGE [1]

  1. X — SemiAnalysis TIER_1 English(EN) · SemiAnalysis_ ·

    We believe the MI455 is the first known chip to ship with active Local Silicon Interconnect (LSI) bridges, the chiplet-to-chiplet links inside a CoWoS-L package

    We believe the MI455 is the first known chip to ship with active Local Silicon Interconnect (LSI) bridges, the chiplet-to-chiplet links inside a CoWoS-L package. In CoWoS-L's short history, those bridges have always been passive: wiring and capacitors, nothing more. Active LSIs …

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