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New techniques mitigate retention loss in analog AI hardware

By PulseAugur Editorial · [1 sources] ·

Researchers have developed methods to counteract the accuracy degradation caused by retention loss in analog in-memory computing hardware. By combining circuit-level compensation techniques with algorithmic recalibration, specifically batch normalization, they can mitigate the impact of data decay over time. Experiments on a 65 nm CMOS array using neural network models like VGG-10 and WideResNet-28-10 demonstrated that these combined techniques can restore inference accuracy to within 2-4% of the baseline even after 60 days. AI

IMPACT Improves the long-term reliability and accuracy of AI computations performed directly on specialized hardware.

RANK_REASON Academic paper detailing a novel technical approach to a specific problem in AI hardware. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.NE (Neural & Evolutionary) →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

New techniques mitigate retention loss in analog AI hardware

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Academic paper detailing a novel technical approach to a specific problem in AI hardware. [lever_c_demoted from research: ic=1 ai=1.0]
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61 days old
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COVERAGE [1]

  1. arXiv cs.NE (Neural & Evolutionary) TIER_1 English(EN) · Giuseppe Iannaccone ·

    Mitigating the Impact of Retention Loss on Inference Accuracy in 65 nm Single-Poly Floating-Gate Analog In-Memory Computing

    We show with experiments and system-level simulations that it is possible to successfully mitigate the impact of retention loss on inference accuracy degradation by using both circuit-level compensation techniques and batch normalization recalibration at the algorithmic level. Ex…

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