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LLM-powered framework automates chip design rule correction

By PulseAugur Editorial · [1 sources] ·

Researchers have developed DRC-Aid, an agentic framework that automates the correction of design rule violations (DRVs) in chip layouts. The system uses a Large Language Model (LLM) to select geometric edits from a predefined menu, guided by a deterministic rule engine and a memory bank to prevent redundant exploration. Evaluated on FreePDK45 layouts, DRC-Aid successfully repaired DRVs in approximately 92.5% of cases, achieving a near-complete violation reduction. This LLM-driven approach significantly outperformed random and heuristic methods in repair accuracy. AI

IMPACT Automates a critical step in chip design, potentially accelerating development cycles and improving yield.

RANK_REASON Academic paper detailing a novel framework for chip design automation. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.LG →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

LLM-powered framework automates chip design rule correction

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Academic paper detailing a novel framework for chip design automation. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. arXiv cs.LG TIER_1 English(EN) · Anushka Mukherjee, Kang He, Kaushik Roy ·

    DRC-Aid: Design-Rule Correction via Agentic Framework utilizing Inference-Time Large Language Models

    arXiv:2607.22761v1 Announce Type: cross Abstract: Resolving Design Rule Violations (DRVs) in layouts entails an iterative loop of geometric edits and verification. We present DRC-Aid, a closed-loop agentic framework that automates local DRC repair by formulating it as verificatio…

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