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Huawei's Tao's Law boosts Kirin 2026 chip density with Logic Folding

Huawei has detailed advancements in chip manufacturing with its "Tao's Law" initiative, focusing on a "Logic Folding" technique. This method allows for increased transistor density, reaching 175 million transistors per square millimeter, without relying on advanced EUV lithography. The company's Kirin 2026 chip is expected to benefit from this technology, potentially achieving a 41% power reduction and targeting clock speeds of 5GHz by 2031. AI

IMPACT This advancement in transistor density and power efficiency could enable more powerful and efficient AI hardware.

RANK_REASON The cluster details a new technological process and its application in a specific chip, based on a research paper.

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AI-generated summary · Google Gemini · from 2 sources. How we write summaries →

Huawei's Tao's Law boosts Kirin 2026 chip density with Logic Folding

COVERAGE [2]

  1. Pandaily TIER_1 English(EN) · [email protected] (Pandaily) ·

    Huawei Reworks 5nm: Tao's Law Delivers Kirin 2026 With Logic Folding Breakthrough

    Huawei's Tao's Law V2 paper reveals Kirin 2026 with Logic Folding, boosting transistor density to 175MTr/mm² without advanced EUV lithography.

  2. Pandaily TIER_1 English(EN) · [email protected] (Pandaily) ·

    Huawei Updates Tao's Law Paper, Discloses Detailed LogicFolding Process Parameters for First Time

    Huawei's V2 Tao's Law paper reveals Kirin 2026 achieves 41% power reduction at equal performance, sets 5GHz target by 2031, and details gear ratio and bonding parameters.