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中文(ZH) 华为何庭波发布V2版“韬定律”论文 补充工程细节和实测数据

Huawei releases V2 "Tao Ding Law" paper with engineering details and chip data

Huawei's semiconductor head, Teresa He Tingbo, has released a V2 version of the "Tao Ding Law" paper on ChinaXiv. This updated version expands on the original theory with detailed engineering implementation specifics and empirical test data. It further refines the post-Moore era scaling theory centered on the time constant τ, introducing concepts like LogicFolding's "gearratio" for unit-level continuous optimization in 3D design. The paper also includes new mass-production test data comparing the Kirin2026 and Kirin9030Pro chips on voltage, frequency, power consumption, and density. AI

IMPACT This theoretical advancement and its empirical data could inform future chip design and optimization strategies in the semiconductor industry.

RANK_REASON The item describes the release of a V2 version of a scientific paper detailing a new theory and its engineering applications. [lever_c_demoted from research: ic=1 ai=0.7]

Read on 36氪 (36Kr) →

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Huawei releases V2 "Tao Ding Law" paper with engineering details and chip data

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The item describes the release of a V2 version of a scientific paper detailing a new theory and its engineering applications. [lever_c_demoted from research: ic=1 ai=0.7]
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  1. 36氪 (36Kr) TIER_1 中文(ZH) ·

    Huawei's He Tingbo Releases V2 Version of 'Tao Ding Law' Paper, Supplementing Engineering Details and Actual Test Data

    根据中国科学院科技论文预发布平台ChinaXiv最新公示论文,华为半导体负责人何庭波于7月3日发布《面向多层级电子系统的时间缩微理论》(业内也称“韬定律”)V2版本。相比较5月25日发布的V1版本,新版论文在原有理论框架基础上,补充了大量工程落地细节、实测量化数据与产品演进路线,进一步完善了以时间常数τ为核心的后摩尔时代缩放理论体系。在工程落地方面,V2版本深度阐释核心技术LogicFolding的齿比(gearratio)概念,在混合键合间距接近顶层金属布线尺寸时,3D设计空间从传统的“宏块级离散优化”转向“单元级连续优���”,可实现全局最优的垂直逻…