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Quantum Neural Networks Compared for Semiconductor Defect Classification

By PulseAugur Editorial · [2 sources] ·

A new research paper explores the application of quantum neural networks (QNNs) for classifying defects in semiconductor wafer maps, a critical step for improving manufacturing yield. The study directly compares continuous-variable (CV) and discrete-variable (DV) QNN paradigms using the WM-811K dataset. Results indicate that CV-QNNs consistently outperform DV-QNNs, achieving significantly higher accuracy and better performance on specific defect types that require capturing fine spatial distinctions. AI

IMPACT This research could inform the development of specialized quantum hardware for AI tasks, potentially accelerating defect detection in semiconductor manufacturing.

RANK_REASON Research paper detailing a comparison of quantum computing paradigms for a specific industrial application. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.LG →

AI-generated summary · Google Gemini · from 2 sources. How we write summaries →

Quantum Neural Networks Compared for Semiconductor Defect Classification

COVERAGE [2]

  1. arXiv cs.LG TIER_1 English(EN) · Yeonhong Kim, Jonghyeok Im, Monu Nath Baitha, Kyoungsik Kim ·

    Bridging Quantum Computing Paradigms toward Semiconductor Yield: A Controlled CV-versus-DV Comparison on Wafer-Map Defect Classification

    arXiv:2607.00961v1 Announce Type: cross Abstract: Realizing quantum neural networks (QNNs) in industry requires knowing which quantum computing paradigm suits which task. Motivated by AI accelerators and high-bandwidth memory, where die stacking makes wafer-level defect screening…

  2. arXiv cs.LG TIER_1 English(EN) · Kyoungsik Kim ·

    Bridging Quantum Computing Paradigms toward Semiconductor Yield: A Controlled CV-versus-DV Comparison on Wafer-Map Defect Classification

    Realizing quantum neural networks (QNNs) in industry requires knowing which quantum computing paradigm suits which task. Motivated by AI accelerators and high-bandwidth memory, where die stacking makes wafer-level defect screening central to yield, we study WM-811K wafer-map defe…

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