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Open-source stochastic neuron designed for edge hardware

Researchers have developed an open-source, stochastic leaky integrate-and-fire neuron designed for event-driven edge hardware. This compact neuron, implemented in SkyWater 130 nm CMOS technology, utilizes a linear-feedback shift register to control firing probability and a leaky integrator for spike generation. The design is configurable via a serial interface and occupies approximately 10,600 square micrometers, meeting 50 MHz timing requirements. AI

IMPACT This research contributes to the development of more efficient hardware for AI applications at the edge.

RANK_REASON The cluster contains an academic paper detailing a new hardware design for a neuron. [lever_c_demoted from research: ic=1 ai=1.0]

Read on arXiv cs.NE (Neural & Evolutionary) →

AI-generated summary · Google Gemini · from 1 sources. How we write summaries →

Open-source stochastic neuron designed for edge hardware

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The cluster contains an academic paper detailing a new hardware design for a neuron. [lever_c_demoted from research: ic=1 ai=1.0]
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COVERAGE [1]

  1. arXiv cs.NE (Neural & Evolutionary) TIER_1 English(EN) · Santhosh Sivasubramani ·

    An Open-Source LFSR-Based Stochastic Leaky Integrate-and-Fire Neuron in SkyWater 130 nm: Design, Stochastic Characterisation, and Rate Coding

    Stochastic spiking neurons trade exact arithmetic for controlled randomness, lowering area and tolerating input noise, which suits event-driven edge hardware. We present a compact, configurable stochastic leaky integrate-and-fire neuron in standard-cell CMOS on the SkyWater 130 n…